PIC18F83J11T-I/PT【PDF 72/332 页】IC PIC MCU FLASH 4KX16 80TQFP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3871

68页 69页 70页 71页 [72页]73页 74页 75页 76页

2010 Microchip Technology Inc.

DS39774D-page 163

PIC18F85J11 FAMILY

14.0 TIMER2 MODULE

The Timer2 module incorporates the following features:

8-bit Timer and Period registers (TMR2 and PR2,

respectively)

Readable and writable (both registers)

Software programmable prescaler

(1:1, 1:4 and 1:16)

Software programmable postscaler

(1:1 through 1:16)

Interrupt on TMR2 to PR2 match

Optional use as the shift clock for the

MSSP module

The module is controlled through the T2CON register

(Register 14-1) which enables or disables the timer and

configures the prescaler and postscaler. Timer2 can be

shut off by clearing control bit, TMR2ON (T2CON<2>),

to minimize power consumption.

A simplified block diagram of the module is shown in

Figure 14-1.

14.1

Timer2 Operation

In normal operation, TMR2 is incremented from 00h on

each clock (FOSC/4). A 4-bit counter/prescaler on the

clock input gives direct input, divide-by-4 and

divide-by-16 prescale options. These are selected by

the

prescaler

control

bits,

T2CKPS<1:0>

(T2CON<1:0>). The value of TMR2 is compared to that

of the Period register, PR2, on each clock cycle. When

the two values match, the comparator generates a

match signal as the timer output. This signal also resets

the value of TMR2 to 00h on the next cycle and drives

the output counter/postscaler (see Section 14.2

“Timer2 Interrupt”).

The TMR2 and PR2 registers are both directly readable

and writable. The TMR2 register is cleared on any

device Reset while the PR2 register initializes at FFh.

Both the prescaler and postscaler counters are cleared

on the following events:

a write to the TMR2 register

a write to the T2CON register

any device Reset (Power-on Reset, MCLR Reset,

Watchdog Timer Reset or Brown-out Reset)

TMR2 is not cleared when T2CON is written.

REGISTER 14-1:

T2CON: TIMER2 CONTROL REGISTER

U-0

R/W-0

—

T2OUTPS3

T2OUTPS2

T2OUTPS1

T2OUTPS0

TMR2ON

T2CKPS1

T2CKPS0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘0’

bit 6-3

T2OUTPS<3:0>: Timer2 Output Postscale Select bits

0000

= 1:1 Postscale

0001

= 1:2 Postscale

1111

= 1:16 Postscale

bit 2

TMR2ON: Timer2 On bit

= Timer2 is on

= Timer2 is off

bit 1-0

T2CKPS<1:0>: Timer2 Clock Prescale Select bits

= Prescaler is 1

= Prescaler is 4

= Prescaler is 16

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式